Synopsys and Intel Collaborate on Advanced Chip Designs

Synopsys and Intel Corporation have announced a collaboration to advance angstrom-scale chip designs using Intel's 18A and 18A-P technologies. Announced in a press release, this partnership aims to accelerate the development of high-performance designs with Synopsys' production-ready electronic design automation (EDA) flows and broad IP portfolio.

The collaboration includes the availability of Synopsys' certified AI-driven digital and analog design flows for the Intel 18A process node and production-ready EDA flows for the Intel 18A-P process node. These technologies feature the RibbonFET Gate-all-around transistor architecture and the industry's first commercial foundry implementation of PowerVia backside power delivery.

Synopsys and Intel are also working together to enable Intel's new Embedded Multi-die Interconnect Bridge-T (EMIB-T) advanced packaging technology. This is supported by an EDA reference flow powered by Synopsys' 3DIC Compiler, which facilitates efficient design creation and optimization for multi-die solutions.

Additionally, Synopsys has expanded its IP portfolio to support advanced angstrom-level designs, including high-performance and low-power IP for Intel 18A and Intel 18A-P. This expansion aims to provide customers with faster time-to-tapeout and enhanced power distribution and performance for next-generation AI and high-performance computing applications.