Analog Devices Releases CodeFusion Studio 2.0 for Embedded AI Development

Nov 4, 2025
Analog Devices has launched CodeFusion Studio 2.0, an updated version of its open-source platform designed to simplify and accelerate AI-enabled embedded system development with unified tools, model integration, and performance profiling.

Analog Devices, Inc. has launched CodeFusion Studio 2.0, a major update to its open-source embedded development platform, announced in a press release. The new version is designed to simplify and accelerate the creation of AI-enabled embedded systems across the company’s hardware portfolio.

CodeFusion Studio 2.0 introduces end-to-end AI workflow support, including bring-your-own-model capability, model compatibility checks, and performance profiling tools. It enables developers to deploy models efficiently across Analog Devices’ processors and microcontrollers, from low-power edge devices to high-performance digital signal processors.

The platform, built on Microsoft’s Visual Studio Code, includes a Zephyr-based modular framework for runtime AI and machine learning profiling. This allows layer-by-layer analysis, improving integration with heterogeneous platforms and reducing toolchain complexity.

Additional updates include unified configuration tools, multi-core application support, and integrated debugging features such as Core Dump Analysis and GDB support. CodeFusion Studio 2.0 is now available for download, along with documentation and community resources on Analog Devices’ developer website.

We hope you enjoyed this article

Consider subscribing to one of our newsletters like AI Programming Weekly or Daily AI Brief.

Also, consider following us on social media:

Free newsletter

AI Programming Weekly

Weekly news about AI tools for software engineers, AI enabled IDE's and much more.

Whitepaper

Tensordyne Napier: What If One Rack Could Do the Work of Nine?

Tensordyne

This Tensordyne whitepaper presents Napier, an inference-focused AI processor and rack-scale system based on the company’s TDN Math logarithmic number system. It examines infrastructure requirements for large mixture-of-experts and agentic models, compares major inference architecture approaches, and details the TDN AIP processor, TDN72 pod, TDN Link fabric, and Napier Ultra configuration. The paper reports simulation-based performance, cost, and accuracy-validation results, including Tensordyne’s projected comparison of one Napier rack with a nine-rack Nvidia Rubin plus Groq deployment; the chip is reported as taped out and in fabrication.

Read more
Free, six days a week

Daily AI Brief: the AI news that matters, in your inbox.