InPsytech Showcases 3nm UCIe 3.0 Chiplet Technology at OCP Global Summit 2025

InPsytech, a subsidiary of Egis Technology, showcased its 3nm UCIe 3.0 high-speed interface technology at the OCP Global Summit 2025 in San Jose, California, announced in a press release. The demonstration featured full UCIe 3.0 standard compliance, 3D packaging integration, and data transfer rates up to 64 GT/s, emphasizing low power consumption and high efficiency for chiplet interconnects.

The company’s UCIe portfolio supports process nodes from 22nm down to 2nm and is optimized for 3nm production. The showcased technology highlights InPsytech’s focus on enabling chip-to-chip interconnects for heterogeneous integration in advanced semiconductor designs.

In collaboration with Alcor Micro, InPsytech’s UCIe technology has been integrated into Alcor’s Arm-based CPU platform, Mobius100 (CSS V3). The platform, built on Arm Neoverse CSS architecture, supports die-to-die interconnects and integration with GPUs, NPUs, and AI accelerators. Both companies are members of the Arm Total Design program, contributing to the development of the Arm chiplet ecosystem.