Open Compute Project Expands Open Chiplet Ecosystem with Arm and Eliyan Contributions

November 10, 2025
The Open Compute Project Foundation announced new contributions from Arm and Eliyan to its Open Chiplet Economy, introducing the Foundation Chiplet System Architecture and BoW 2.0 memory interconnect enhancements for AI and HPC workloads.

The Open Compute Project Foundation has announced major additions to its Open Chiplet Economy, including new contributions from Arm and Eliyan, announced in a press release. These updates introduce the Foundation Chiplet System Architecture (FCSA) and BoW 2.0 enhancements aimed at improving interoperability and performance for AI and high-performance computing (HPC) workloads.

The Arm-led Foundation Chiplet System Architecture provides a vendor-neutral baseline for partitioning monolithic systems into interoperable chiplets, supporting processors, memory, I/O, and accelerators across architectures. The specification is designed to help system-in-package designers reuse chiplets, streamline validation tools, and reduce reliance on proprietary standards.

Eliyan contributed updates to the OCP Chiplet Interconnect Specification (BoW 2.0), targeting high-bandwidth memory use cases. The enhancements add support for dynamic bidirectional data, error correction, and clock alignment options suitable for advanced memory applications such as HBM4, which demands bandwidths of up to 2TB/s.

These contributions expand the Open Chiplet Economy initiative launched in 2024, which includes a chiplet marketplace cataloging components, design tools, and services. The new specifications are intended to foster open, interoperable silicon design for scalable AI and HPC systems.

We hope you enjoyed this article.

Consider subscribing to one of our newsletters like Silicon Brief or Daily AI Brief.

Also, consider following us on social media:

AI Chips & Datacenters AI Brief AI Brief (X)

More from: Data Centers

09/10
CATL Leads DeepCtrls Series B+ Funding Round
09/09
Innventure removes DarkNX AI data centre cooling project from bookings
09/09
Besxar Tests Semiconductor Manufacturing Canisters on SpaceX Rocket
09/09
DIMAAG-AI and Toshiba Develop Battery Storage for AI Data Centers
09/09
Knox Systems Launches IL5 Environment for Defense AI and Software

Subscribe to Silicon Brief

Weekly coverage of AI hardware developments including chips, GPUs, cloud platforms, and data center technology.

AI Token Webinar

Whitepaper

Tensordyne Napier: What If One Rack Could Do the Work of Nine?

Tensordyne

This Tensordyne whitepaper presents Napier, an inference-focused AI processor and rack-scale system based on the company’s TDN Math logarithmic number system. It examines infrastructure requirements for large mixture-of-experts and agentic models, compares major inference architecture approaches, and details the TDN AIP processor, TDN72 pod, TDN Link fabric, and Napier Ultra configuration. The paper reports simulation-based performance, cost, and accuracy-validation results, including Tensordyne’s projected comparison of one Napier rack with a nine-rack Nvidia Rubin plus Groq deployment; the chip is reported as taped out and in fabrication.

Read more

You May Also Like