Marvell Introduces Advanced Packaging for AI Accelerators

Marvell Technology, Inc. has introduced a novel multi-die packaging platform designed to enhance custom AI accelerators, announced in a press release. This advanced platform aims to lower power consumption and total cost of ownership for AI infrastructure.

The new packaging solution features a modular RDL interposer, which provides an alternative to traditional silicon interposers, offering supply chain flexibility for data center infrastructure. The platform supports multi-chip accelerator designs that are 2.8 times larger than conventional single-die implementations, enabling more efficient die-to-die interconnects and increased chiplet yields.

Marvell's solution has been production-qualified with a major hyperscaler and is now entering production ramp. The platform integrates 1390 mm² of silicon and four HBM3/3E memory stacks, utilizing six interposer RDL layers. This allows for shorter die-to-die interconnects and a modular design that reduces material costs and increases chiplet yields.

The company is collaborating with top hyperscalers to develop custom XPUs and CPUs for cloud and AI clusters, further optimizing accelerated infrastructure. This initiative is part of Marvell's broader strategy to deliver innovative semiconductor designs and enhance AI infrastructure performance.