Synopsys Expands Hardware-Assisted Verification Portfolio with New Prototyping and Emulation Systems

Synopsys, Inc. has announced the expansion of its hardware-assisted verification (HAV) portfolio with the introduction of the HAPS-200 prototyping and ZeBu-200 emulation systems. These new systems are designed to deliver the industry's fastest performance, improving runtime and compile times while enhancing debug productivity.

The HAPS-200 prototyping system offers a significant performance boost, with a 4X improvement in debug performance over its predecessor, the HAPS-100. It supports mixed system setups scalable from single FPGA to multi-rack configurations, accommodating up to 10.8 billion gates.

Similarly, the ZeBu-200 emulation system extends design capacity to 15.4 billion gates and offers up to 2X higher runtime performance compared to the previous generation. It features enhanced debug bandwidth and improved job scheduling, making it suitable for handling complex designs.

Both systems are built on the Synopsys Emulation and Prototyping (EP-Ready) Hardware platform, which optimizes return on investment by allowing flexible configuration for emulation and prototyping use cases. This platform supports direct and scalable connectivity, leveraging a broad portfolio of solutions for leading interface protocols.

The new systems are already available for early access customers, providing industry leaders like AMD, Arm, NVIDIA, and SiFive with advanced tools to tackle the challenges of next-generation semiconductor design.