AMD Adds UCIe Support to Select Versal Adaptive SoCs
AMD announced that select Versal RF Series adaptive SoCs will support Universal Chiplet Interconnect Express 1.1 interfaces. The support is designed to let Versal devices communicate directly with chiplets in the same package for workloads such as RF, AI, CPU, GPU, security, communications, and ASIC functions.
Select Versal RF Series devices will support up to four UCIe-SP interfaces and up to two UCIe-AP interfaces, with aggregate bandwidth at multiple terabits per second inside the package. The devices combine high resolution RF data converters, dedicated DSP IP, AI Engines, and programmable logic, and provide up to 80 TOPS of DSP compute.
The UCIe connections will support use with RF analog front ends, AI acceleration chiplets, CPUs, GPUs, custom security engines, communications processors, and application specific ASICs. Production chiplets are expected to be available with select Versal RF Series devices in the fourth quarter of 2027.
We hope you enjoyed this article
Consider subscribing to one of our newsletters like Silicon Brief or Daily AI Brief.
Also, consider following us on social media:
More from Data Centers
Sep 12 Nscale Adds Fidji Simo to a Board Built for Scale Sep 11 Bain's Model Puts AI at 0.7% of Global Energy, Against 11% From Executives and 19% From Consumers Sep 11 Q.ANT Names Joerg Behrend Vice President of Hardware Sep 11 Zettabyte and Raku Plan Renewable Energy AI Data Centers in Asia Sep 11 IREX Unveils StreamVLM for Public Safety Video AnalyticsSilicon Brief
Weekly coverage of AI hardware developments including chips, GPUs, cloud platforms, and data center technology.
Whitepaper
Tensordyne Napier: What If One Rack Could Do the Work of Nine?
Tensordyne
This Tensordyne whitepaper presents Napier, an inference-focused AI processor and rack-scale system based on the company’s TDN Math logarithmic number system. It examines infrastructure requirements for large mixture-of-experts and agentic models, compares major inference architecture approaches, and details the TDN AIP processor, TDN72 pod, TDN Link fabric, and Napier Ultra configuration. The paper reports simulation-based performance, cost, and accuracy-validation results, including Tensordyne’s projected comparison of one Napier rack with a nine-rack Nvidia Rubin plus Groq deployment; the chip is reported as taped out and in fabrication.
Read moreYou may also like
ASUS Expands AI Infrastructure From Cloud to Edge
Qualcomm and Amazon to Develop Custom Silicon for AI Data Centers
Acer Introduces Veriton RI110 AI Mini Workstation
Achronix Releases JESD204C IP Core for Speedster7t FPGAs
Primemas Shows CXL Memory Products for Abaco AI System
Daily AI Brief: the AI news that matters, in your inbox.